Copper (Cu) is selected as the interconnect material of choice for the fabrication of ultra large scale integrated circuits (ULSI circuits) due to its lower resistivity and high electromigration resistance as compared to aluminum (Al). This requires the utilization of the damascene process for the fabrication of Cu interconnects. Unlike Al metallization, the damascene process relies on depositing Cu onto the patterned dielectric by electrochemical deposition (ECD). Since Cu readily diffuses into the dielectric, a diffusion barrier is deposited prior to Cu deposition.
Along with the decrease in feature sizes and the limitation of the physical vapor deposition process (PVD) for fabricating below 0.13 mm technology, the demand for effective diffusion barriers with decreasing film thickness has increased. This has necessitated the use of atomic layer deposition (ALD) for barrier metal deposition. This is because ALD provides deposition of a uniform thin layer.
In the manufacturing of microelectronic devices, Cu is susceptible to corrosion for many reasons. Even though Cu is a noble metal, it readily reacts in oxidizing environments. Corrosion of Cu interconnects during IC manufacturing is believed to occur mostly during the CMP process where Cu contacts the CMP slurry.
Chemical mechanical planarization or polishing (CMP) is used to polish the excess Cu overburden and barrier metal to provide surface planarity.
Chemical corrosion, photo-corrosion, narrow trench corrosion, and galvanic corrosion are reported to be the possible mechanisms of Cu corrosion during CMP. Galvanic corrosion (also referred to as bimetallic corrosion) occurs due to electrochemical incompatibility between two dissimilar metals that are in electrical and ionic contact. Thus, if the barrier metal is electrochemically incompatible with Cu, then galvanic corrosion takes place during the CMP process when the slurry acts as the electrolyte. It is either Cu or the barrier metal that acts as the anode, and thus suffers from enhanced etching as a result of the galvanic coupling.
Many barrier metals, such as Ta, TaN, Ti, TiN, W, and Tungsten Nitride Carbide (WNC) have been the scope of research for their potential use as diffusion barriers due to their ease of deposition, good step coverage, and good adhesion between Cu and the dielectric.
However, some are reported to be responsible for galvanic corrosion. Tungsten-containing barriers, e.g., WNC, suffer from galvanic corrosion when H2O2-containing slurries are used. This means that there will be a loss of barrier material on the top corners of the trenches at the interface of the copper and barrier layer after polishing.
Indeed, tungsten (W) etching during CMP is attributed to the oxidation and subsequent dissolution of the W-oxide complex into the slurry, leading to the formation of a complex surface film.
The oxidation occurs in two steps in many cases. H2O2 is shown to form a complicated non-stoichiometric WO2/WO3 duplex oxide, which is stated to be more soluble in the presence of H2O2 than in its absence.
The introduction of very thin barrier layers (such as ALD deposited WNC barriers) makes this problem even more critical.
It is believed that the mechanism of chemical etching of ALD (Atomic Layer Deposition) WNC barrier metal is also due to the oxidation of W in the WNC film by H2O2 in the solution. The oxidation and subsequently dissolution of W from the W-containing barrier layer is strongly enhanced because of the galvanic coupling of the W-containing barrier to the Cu layer, which gives rise to a high potential difference between the W layer and the Cu layer.
Therefore, the successful integration of W-containing barriers layers, such as WCN, in the copper metallization scheme requires the use of another oxidizer in the slurry.